• DocumentCode
    1014779
  • Title

    An Ultra Low Power 500MHz Dual Modulus Prescaler

  • Author

    Ishioka, T. ; Ueno, M. ; Nakazawa, T. ; Watanabe, T. ; Oida, Y. ; Tokumaru, Y.

  • Author_Institution
    Toshiba Corporation, Semiconductor Division
  • Issue
    3
  • fYear
    1985
  • Firstpage
    568
  • Lastpage
    575
  • Abstract
    Frequency synthesized tunning system utlizing Phase Locked Loop (PLL) technique has been used in many kinds of communication fields due to the stability and accuracy. Recently this system has been adopted in consumer and communication fields used a battery type supply, for example, cordless telephone and personal radio and so on. Therefore, the drastic improvement concerning about power saving and physical dimensions of the system has been strongly required. However, in the conventional technique, the approach for the reduction of power consumption has been realized at a typical 5V operation.
  • Keywords
    Clocks; Counting circuits; Delay effects; Energy consumption; Feeds; Frequency synthesizers; Logic circuits; Low voltage; Phase locked loops; Timing;
  • fLanguage
    English
  • Journal_Title
    Consumer Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-3063
  • Type

    jour

  • DOI
    10.1109/TCE.1985.289972
  • Filename
    4071279