• DocumentCode
    1015381
  • Title

    A high-speed complementary silicon bipolar technology with 12-fJ power-delay product

  • Author

    Cressler, John D. ; Warnock, James ; Harame, David L. ; Burghartz, Joachim N. ; Jenkins, Keith A. ; Chuang, Ching-Te

  • Author_Institution
    Dept. of Electr. Eng., Auburn Univ., AL, USA
  • Volume
    14
  • Issue
    11
  • fYear
    1993
  • Firstpage
    523
  • Lastpage
    526
  • Abstract
    A complementary silicon bipolar technology offering a substantial improvement in power-delay performance over conventional n-p-n-only bipolar technology is demonstrated. High-speed n-p-n and p-n-p double-polysilicon, self-aligned transistors were fabricated in a 20-mask-count integrated process using an experimental test site designed specifically for complementary bipolar applications. N-p-n and p-n-p transistors with 0.50- mu m emitter widths have cutoff frequencies of 50 GHz and 13 GHz, respectively. Two novel complementary bipolar circuits-AC-coupled complementary push-pull ECL, and NTL with complementary emitter-follower-display a significant advantage in power dissipation as well as gate delay when compared to conventional n-p-n-only ECL circuits. Record power-delay products of 34 fJ (23.2 ps at 1.48 mW) and 12 fJ (19.0 ps at 0.65 mW) were achieved for these unloaded complementary circuits, respectively. These results demonstrate the feasibility and resultant performance leverage of high-speed complementary bipolar technologies.<>
  • Keywords
    bipolar integrated circuits; digital integrated circuits; elemental semiconductors; emitter-coupled logic; integrated circuit technology; integrated logic circuits; silicon; 0.65 mW; 1.48 mW; 12 fJ; 13 GHz; 19 ps; 20-mask-count integrated process; 23.2 ps; 34 fJ; 50 GHz; AC-coupled complementary push-pull ECL; NTL; Si; bipolar technology; complementary bipolar circuits; complementary emitter-follower; cutoff frequencies; double-polysilicon; gate delay; high-speed complementary process; power dissipation; power-delay performance; power-delay product; self-aligned transistors; Automatic testing; Bipolar transistors; CMOS logic circuits; CMOS technology; Circuit testing; Integrated circuit technology; Isolation technology; Power dissipation; Silicon on insulator technology; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.258003
  • Filename
    258003