Observation and characterization of near-interface oxide traps with C-V techniques

Author

Cohen, Neil L. ; Paulsen, Ronald E. ; White, Marvin H.

Author_Institution

Sherman Fairchild Center for Solid State Studies, Lehigh Univ., Bethlehem, PA, USA

Volume

42

Issue

11

fYear

1995

fDate

11/1/1995 12:00:00 AM

Firstpage

2004

Lastpage

2009

Abstract

The anomalous hump observed in low frequency C-V curves of stressed devices is attributed to near-interface oxide traps, rather than so-called “interface” traps. A low frequency C-V model has been developed to interpret the effect of near-interface oxide traps which communicate with the Si-SiO₂ interface traps and influence C-V characteristics. At low measurement frequencies, electrons have sufficient time to tunnel from interface traps and fill near-interface oxide traps via a trap-to-trap tunneling mechanism. By varying the measurement frequency, a spatial distribution of near-interface oxide traps is obtained. A consistent near-interface oxide trap distribution has been extracted for a trap-rich SONGS memory transistor using both variable frequency Hi-Lo C-V and charge pumping techniques

Keywords

MOSFET; capacitance; elemental semiconductors; interface states; semiconductor-insulator boundaries; silicon; silicon compounds; tunnelling; C-V characteristics; CMOS devices; ONO device; SONOS memory transistor; Si-SiO₂; Si-SiO₂ interface traps; Si-SiO₂-Si₃N₄-SiO₂-Si; anomalous hump; charge pumping technique; electron tunneling; low frequency C-V curves; near-interface oxide traps; spatial trap distribution; stressed devices; trap-to-trap tunneling mechanism; Capacitance-voltage characteristics; Charge pumps; Dielectric devices; Electron traps; Frequency measurement; Hot carrier injection; Radiative recombination; Solid state circuits; Time measurement; Tunneling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.469410

Filename

469410