DocumentCode :
1015415
Title :
21-ps 0.1- mu m CMOS devices operating at room temperature
Author :
Izawa, Tamon ; Watanabe, Koh ; Kawamura, Seiichiro
Author_Institution :
LSI Wafer Process Div., Fujitsu Ltd., Kawasaki, Japan
Volume :
14
Issue :
11
fYear :
1993
Firstpage :
533
Lastpage :
535
Abstract :
High-speed complementary metal-oxide semiconductor (CMOS)-inverter ring oscillators with the shortest gate length of 0.17 mu m were fabricated by a conventional large-scale integrated (LSI) technology. The propagation delays were 21 ps / stage (2.0 V) at room temperature and 17 ps / stage (2.0 V) at 80 K. These results are the fastest records reported for bulk CMOS devices as of today. The results were obtained by reducing effective drain junction capacitances with "double-finger gates," and devices will probably be faster if the areas are completely proportionally reduced to the feature size. Though it is important for CMOS devices to increase drain currents, a silicidation technique for source and drain was not necessary for the tested devices to reduce series resistance.<>
Keywords :
CMOS integrated circuits; integrated logic circuits; large scale integration; logic gates; 0.17 mum; 17 ps; 2.0 V; 21 ps; 296 K; 80 K; CMOS-inverter ring oscillators; LSI technology; double-finger gates; drain currents; effective drain junction capacitances; feature size; gate length; logic gates; propagation delays; room temperature; CMOS technology; Capacitance; Doping; Fabrication; Large scale integration; MOSFET circuits; Propagation delay; Ring oscillators; Silicidation; Temperature;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.258006
Filename :
258006
Link To Document :
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