DocumentCode
1015424
Title
Anomalous hot-carrier behavior for LDD p-channel transistors
Author
Doyle, B.S. ; Mistry, K.R.
Author_Institution
Digital Equipment Corp., Hudson, MA, USA
Volume
14
Issue
11
fYear
1993
Firstpage
536
Lastpage
538
Abstract
It has previously been reported that gradual junction p-channel transistors can have shorter lifetimes under hot-carrier stress conditions than abrupt junction devices (see IEEE Trans. Electron Devices, vol. 39, p. 2290-98, 1992). Here, the work is extended to LDD (lightly doped drain) structures. p-MOS hot-carrier effects are examined for deep submicron structures with abrupt and LDD junctions. It is shown that, contrary to the case of n-MOS transistors, the lifetimes for hot-carrier stress of the LDD p-MOS transistors are actually shorter than their abrupt junction counterparts, in the range of LDD dopings examined here. This is explained in terms of two competing mechanisms, gate electronic injection, which decreases for the LDD junctions, and the size of the damage region in the oxide, which increases for the LDD junctions. It is concluded that using LDD-type structures for hot-carrier control does not automatically guarantee longer lifetimes.<>
Keywords
hot carriers; insulated gate field effect transistors; reliability; LDD p-channel transistors; PMOS device; anomalous hot-carrier behavior; deep submicron structures; gate electronic injection; hot-carrier stress conditions; lightly doped drain; p-MOS hot-carrier effects; Dielectric materials; Doping; Fabrication; Hot carrier effects; Hot carriers; Implants; Silicon; Stress; Threshold voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.258007
Filename
258007
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