DocumentCode :
1016686
Title :
Inversion/accumulation-mode polysilicon thin-film transistors: characterization and unified modeling
Author :
Qian, Feng ; Kim, Dae M. ; Kawamoto, Galen H.
Author_Institution :
Dept. of Appl. Phys. & Electr. Eng., Oregan Graduate Center, Beaverton, OR, USA
Volume :
35
Issue :
9
fYear :
1988
fDate :
9/1/1988 12:00:00 AM
Firstpage :
1501
Lastpage :
1509
Abstract :
n- and p-channel enhancement-mode polysilicon thin-film transistors are characterized. The device performance is modeled with the use of an effective doping model. This enables a unified description of both n- and p-channel devices. The model is simple, analytic, and in satisfactory agreement with experimental data. The transconductance behavior is discussed in correlation with the grain boundary properties. The threshold voltage is shown to be determined by the trapped electrons and holes, respectively, and it changes appreciably depending on the gate and drain voltages
Keywords :
electron traps; elemental semiconductors; grain boundaries; hole traps; semiconductor device models; silicon; thin film transistors; TFT; characterization; device performance; doping model; enhancement-mode; grain boundary properties; inversion/accumulation mode; n-channel device; p-channel; polycrystalline Si; polysilicon; thin-film transistors; threshold voltage; transconductance behavior; trapped electrons; trapped holes; unified modeling; Amorphous materials; Capacitance; Doping; Electron traps; Grain boundaries; Semiconductor device modeling; Semiconductor process modeling; Silicon; Thin film transistors; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.2583
Filename :
2583
Link To Document :
بازگشت