Three-phase three-level active power filter with a clamped capacitor topology

An eight-switch voltage source inverter for harmonic elimination and reactive power compensation is presented. The adopted inverter is based on a three-phase two-leg clamped capacitor circuit topology to reduce the voltage stress on the power semiconductors. Four active switches and one clamped capacitor are used in each inverter leg to achieve three-level pulse-width modulation. The adopted inverter is operated as a controllable current source to supply the necessary active power to compensate for the inverter losses, to eliminate current harmonics and to compensate the reactive power. Therefore, the sinusoidal line currents are drawn from the AC source. Three control loops are used in the control scheme to obtain the constant DC-link voltage, to track the line current command and to balance the neutral-point voltage. The redundant operating states in the adopted inverter can be selected to compensate the clamped capacitor voltage. A mathematical model of the proposed inverter for an active power filter is derived and the control scheme provided. Simulations and experiments based on a laboratory scale-down prototype are presented to verify the effectiveness of the proposed control scheme