DocumentCode
1017409
Title
A New Fast Controller for Digital Signal Processing (DSP) ICS
Author
Winterer, Martin
Author_Institution
Intermetall ITT Semiconductors
Issue
3
fYear
1987
Firstpage
121
Lastpage
128
Abstract
This paper outlines the architecture of a universal controller for DSP-chips. Influenced by RISC-ideas, this VLSI standard cell shows some characteristics which are uncommon to most micro controllers. Its computing power reaches 80 million operations per second. Fabricated in 1.5p¿CMOS the cell area is less than 6 mm2 when completed with a typical memory size of 128 bytes RAM and 2 kbyte ROM.
Keywords
Computer architecture; Consumer products; Digital control; Digital signal processing; Logic; Parallel processing; Programmable control; Random access memory; Read-write memory; Very large scale integration;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/TCE.1987.290250
Filename
4071528
Link To Document