DocumentCode :
1017451
Title :
A highly threshold Voltage-controllable 4T FinFET with an 8.5-nm-thick Si-fin channel
Author :
Liu, Yongxun ; Masahara, Meishoku ; Ishii, Kenichi ; Sekigawa, Toshihiro ; Takashima, Hidenori ; Yamauchi, Hiromi ; Suzuki, Eiichi
Author_Institution :
Nat. Inst. of Adv. Ind. Sci. & Technol., Ibaraki, Japan
Volume :
25
Issue :
7
fYear :
2004
fDate :
7/1/2004 12:00:00 AM
Firstpage :
510
Lastpage :
512
Abstract :
Highly threshold voltage (Vth)-controllable four-terminal (4T) FinFETs with an aggressively thinned Si-fin thickness down to 8.5-nm have successfully been fabricated by using an orientation-dependent wet-etching technique, and the Vth controllability by gate biasing has systematically been confirmed. The Vth shift rate (γ=-δVth/δVg2) dramatically increases with reducing Si-fin thickness (TSi), and the extremely high γ=0.79 V/V is obtained at the static control gate bias mode for the 8.5-nm-thick Si-fin channel device with the 1.7-nm-thick gate oxide. By the synchronized control gate driving mode, γ=0.46 V/V and almost ideal S-slope are achieved for the same device. These experimental results indicate that the optimum Vth tuning for the high performance and low-power consumption very large-scale integrations can be realized by a small gate bias voltage in the ultrathin Si-fin channel device and the orientation-dependent wet etching is the promising fabrication technique for the 4T FinFETs.
Keywords :
VLSI; circuit tuning; etching; field effect integrated circuits; 1.7 nm; 8.5 nm; Vth controllability; aggressively thinned Si-fin thickness; four-terminal FinFET; gate biasing; optimum Vth tuning; orientation-dependent wet-etching; small gate bias voltage; static control gate bias mode; synchronized control gate driving mode; threshold voltage-controllable FinFET; ultrathin Si-Fin channel device; very large-scale integrations; Control systems; Controllability; Fabrication; FinFETs; MOSFET circuits; Thickness control; Threshold voltage; Very large scale integration; Voltage control; Wet etching; -oriented SOI; 110; 4T; DG; Double-gate; FinFET; MOSFET; SCEs; four-terminal; orientation-dependent etching; short-channel effects; threshold voltage $V_rm th$ control;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2004.831205
Filename :
1308436
Link To Document :
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