Title :
A CMOS 10-gb/s SONET transceiver
Author :
Muthali, Harish S. ; Thomas, Thomas P. ; Young, Ian A.
Author_Institution :
Intel Corp., Hillsboro, OR, USA
fDate :
7/1/2004 12:00:00 AM
Abstract :
This paper presents a single-chip SONET OC-192 transceiver (transmitter and receiver) fabricated in a 90-nm mixed-signal CMOS process. The transmitter consists of a 10-GHz clock multiplier unit (CMU), 16:1 multiplexer, and 10-Gb/s output buffer. The receiver consists of a 10-Gb/s limiting input amplifier, clock and data recovery circuit (CDR), 1:16 demultiplexer, and drivers for low-voltage differential signal (LVDS) outputs. Both transmit and receive phase-locked loops employ a 10-GHz on-chip LC voltage-controlled oscillator (VCO). This transceiver exceeds all SONET OC-192 specifications with ample margin. Jitter generation at 10.66-Gb/s data rate is 18 mUIpp (unit interval, peak-to-peak) and jitter tolerance is 0.6 UIpp at 4-MHz jitter frequency. This transceiver requires 1.2V for the core logic and 1.8 V for input/output LVDS buffers. Multiple power supply domains are implemented here to mitigate crosstalk between receiver and transmitter. The overall power dissipation of this chip is 1.65 W.
Keywords :
CMOS integrated circuits; SONET; clocks; crosstalk; demultiplexing; integrated optoelectronics; jitter; mixed analogue-digital integrated circuits; multiplexing; optical communication; optical receivers; optical transmitters; transceivers; 1.2 V; 1.65 W; 1.8 V; 10 GHz; 10 Gbit/s; 4 MHz; 90 nm; CMOS SONET transceiver; CMOS integrated circuits; LVDS buffers; OC-192 specifications; OC-192 transceiver; clock and data recovery circuit; clock multiplier unit; crosstalk mitigation; demultiplexer circuit; drivers circuit; input amplifier; jitter frequency; jitter generation; jitter tolerance; low-voltage differential signal; mixed-signal CMOS; multiple power supply; multiplexer circuit; on-chip LC voltage-controlled oscillator; optical communication; output buffer; phase-locked loops; power dissipation; single-chip SONET; CMOS process; Circuits; Clocks; Differential amplifiers; Jitter; Multiplexing; SONET; Transceivers; Transmitters; Voltage-controlled oscillators; 2; CDR; CMOS integrated circuits; Clock and data recovery; LC VCO; SONET OC-1; optical communication; phase-locked loops; transceiver;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.829935
