Title :
Influence of device geometry on conductance DLTS spectra of GaAs MESFETs
Author :
Blight, S.R. ; Wallis, R.H. ; Thomas, Holly
Author_Institution :
GEC Research Limited, Hirst Research Centre, Wembley, UK
Abstract :
The observation of hole traps in small-signal GaAs MESFETs has been extensively reported in the literature and has been atributed to trapping at the active layer/substrate interface. Evidence is presented here to suggest that the main contribution to the `hole trap-like¿ spectrum in conductance DLTS is the modulation of the surface depletion layer in the ungated access regions of the device.
Keywords :
III-V semiconductors; Schottky gate field effect transistors; deep level transient spectroscopy; electron traps; gallium arsenide; hole traps; surface electron states; GaAs MESFETs; III-V semiconductors; conductance DLTS spectra; deep level transient spectroscopy; device geometry; electron traps; hole traps; surface depletion layer modulation; surface electron states; ungated access regions;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19860032
