Title :
Multiple-Gate CMOS Thin-Film Transistor With Polysilicon Nanowire
Author :
Im, Maesoon ; Han, Jin-Woo ; Lee, Hyunjin ; Yu, Lee-eun ; Kim, Sungho ; Kim, Chang-Hoon ; Jeon, Sang Cheol ; Kim, Kwang Hee ; Lee, Gi Sung ; Oh, Jae Sub ; Park, Yun Chang ; Lee, Hee Mok ; Choi, Yang-Kyu
Author_Institution :
Korea Adv. Inst. of Sci. & Technol., Daejeon
Abstract :
An ultimately scaled multiple-gate CMOS thin-film transistor with a polysilicon (poly-Si) nanowire demonstrates feasibility for vertical integration using multiple active layers for application in the terabit memory era. The short-channel effects are suppressed using a multiple gate to wrap around the nanowire in devices with a size of a few tenths of a nanometer. The switching and output characteristics show high device performance without a crystallization process for the poly-Si nanowire.
Keywords :
CMOS integrated circuits; nanoelectronics; silicon; thin film transistors; Si; multiple active layers; multiple gate CMOS thin-film transistor; polysilicon nanowire; terabit memory; vertical integration; Consumer electronics; Crystallization; Delay effects; Dielectrics; Energy consumption; Grain boundaries; Grain size; Memory; Nanoscale devices; Thin film transistors; CMOS; multiple gate; nanoscale; nanowire; thin-film transistor (TFT); vertical integration;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2007.911982
