DocumentCode :
1020298
Title :
Neural network based approach to standard cell placement
Author :
Sreenivasa Rao, D. ; Patnaik, L.M.
Author_Institution :
Texas Instrum. Pvt. Ltd., Bangalore, India
Volume :
25
Issue :
3
fYear :
1989
Firstpage :
208
Lastpage :
209
Abstract :
Proposes a novel algorithm for placement of standard cells in VLSI circuits base don an analogy of this problem with neural networks. By employing some of the organising principles of these nets, the authors have attempted to improve the behaviour of the bipartitioning method as proposed by Kernighan and Lin. Their algorithm yields better quality placements compared with the above method, and also makes the final placement independent of the initial partition.
Keywords :
VLSI; cellular arrays; circuit layout; neural nets; VLSI circuits; bipartitioning method; initial partition; neural networks; standard cell placement;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19890149
Filename :
130869
Link To Document :
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