DocumentCode
1020365
Title
3.5 GHz bandwidth, 30 dB gain Si monolithic amplifier
Author
Ishihara, Noboru ; Konaka, Shogo ; kamoto, T.
Author_Institution
NTT LSI Labs., Kanagawa, Japan
Volume
25
Issue
3
fYear
1989
Firstpage
217
Lastpage
218
Abstract
A high-gain, wideband Si monolithic amplifier utilising a new parallel feedback and an adjustable peaking technique has been developed using a high-speed Si bipolar process technology. An objective of the design was to enhance gain and bandwidth performance by preventing parasitic oscillation. This IC achieves a wide bandwidth of DC-3.5 GHz, and a high gain of 20 dB. Furthermore, a noise level of 5 dB at 1 GHz and a total power dissipation of 180 mW at a power supply voltage of 6 V were attained.
Keywords
MMIC; bipolar integrated circuits; elemental semiconductors; feedback; linear integrated circuits; microwave amplifiers; optical communication equipment; silicon; wideband amplifiers; 0 to 3.5 GHz; 180 mW; 3.5 GHz; 30 dB; 5 dB; 6 V; Si; adjustable peaking technique; bandwidth performance; high-gain; high-speed Si bipolar process; monolithic amplifier; optical transmission systems; parallel feedback; parasitic oscillation prevention; power supply voltage; satellite transmission systems; total power dissipation; wideband;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19890155
Filename
130875
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