Title :
Relaxed look-ahead pipelined LMS adaptive filters and their application to ADPCM coder
Author :
Shanbhag, Naresh R. ; Parhi, Keshab K.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
fDate :
12/1/1993 12:00:00 AM
Abstract :
Relaxed look-ahead is presented as an attractive technique for pipelining adaptive filters. Unlike conventional look-ahead, relaxed look-ahead does not attempt to maintain the input-output (I/O) mapping between the serial and pipelined architectures but preserves the adaptation characteristics, resulting in a small hardware overhead. Relaxed look-ahead is employed to develop fine-grained pipelined architectures for least-mean-square (LMS) adaptive filtering. The proposed architecture achieves the desired speed-up, with little or no degradation in the convergence behavior. Simulation results verifying the convergence analysis results for the pipelined LMS filter are presented. The filter is then employed to develop a high-speed adaptive differential pulse-code-modulation (ADPCM) codec. The new architecture has a negligible hardware overhead which is independent of the number of quantizer levels, the predictor order and the pipelining level. Additionally, the pipelined codec has a much lower output latency than the level of pipelining. Simulations with image data indicate that speed-ups of up to 43 can be achieved with less than 1-dB loss in SNR
Keywords :
adaptive filters; digital filters; image processing equipment; least squares approximations; parallel architectures; pipeline processing; pulse code modulation; ADPCM coder; adaptation characteristics; convergence behavior; fine-grained pipelined architectures; hardware overhead; image data; least-mean-square; output latency; pipelined LMS adaptive filters; pipelining level; predictor order; relaxed look-ahead; Adaptive filters; Convergence; Degradation; Digital signal processing; Filtering; Hardware; Least squares approximation; Pipeline processing; Signal processing algorithms; Transversal filters;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on