Title :
Novel parallel architectures for short-time Fourier transform
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
fDate :
12/1/1993 12:00:00 AM
Abstract :
Novel parallel architectures for the short-time Fourier transform based on adaptive time-recursive processing is proposed for efficient VLSI implementation. Only one multiplier and one adder are required. The approach can be easily extended to multidimensional cases without the transpose operation. Various properties of the proposed architectures are presented
Keywords :
Fourier transforms; VLSI; digital signal processing chips; parallel architectures; signal processing; VLSI implementation; adaptive time-recursive processing; adder; multiplier; parallel architectures; short-time Fourier transform; Adders; Convolution; Digital signal processing; Discrete Fourier transforms; Equations; Filter bank; Fourier transforms; Parallel architectures; Throughput; Very large scale integration;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
