DocumentCode
1020431
Title
Novel parallel architectures for short-time Fourier transform
Author
Liu, K. J Ray
Author_Institution
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Volume
40
Issue
12
fYear
1993
fDate
12/1/1993 12:00:00 AM
Firstpage
786
Lastpage
790
Abstract
Novel parallel architectures for the short-time Fourier transform based on adaptive time-recursive processing is proposed for efficient VLSI implementation. Only one multiplier and one adder are required. The approach can be easily extended to multidimensional cases without the transpose operation. Various properties of the proposed architectures are presented
Keywords
Fourier transforms; VLSI; digital signal processing chips; parallel architectures; signal processing; VLSI implementation; adaptive time-recursive processing; adder; multiplier; parallel architectures; short-time Fourier transform; Adders; Convolution; Digital signal processing; Discrete Fourier transforms; Equations; Filter bank; Fourier transforms; Parallel architectures; Throughput; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7130
Type
jour
DOI
10.1109/82.260243
Filename
260243
Link To Document