Small-signal drain conductance of MOSFET in saturation region-a simple model

A simple expression is developed which determines an upper bound on the incremental drain conductance of the long-channel MOSFET in saturation. This expression may be used to estimate efficiently lower gain bounds of MOS gain stages at the hand analysis phase of analogue circuit designs. The accuracy achieved is comparable to that of currently used commercial simulators and to the data spread observed in current MOS processes. A criterion for ´long´-channel behaviour in saturation is proposed.