DocumentCode
1021309
Title
GaInAs junction FET with InP buffer layer prepared by selective ion implantation of Be and rapid thermal annealing
Author
Selders, J. ; Wachs, H.J. ; J¿¿rgensen, H.
Author_Institution
Technical University of Aachen, Institute of Semiconductor Electronics, Aachen, West Germany
Volume
22
Issue
6
fYear
1986
Firstpage
313
Lastpage
315
Abstract
GaInAs JFETs were fabricated on VPE-grown GaInAs layers. The pn junctions have been realised with Be ion implantation and rapid thermal annealing. The devices show a high transconductance of 130 mS/mm and an electron saturation velocity of 1.8 à 107 cm/s. Channel mobilities measured at the complete device are as high as 6800 cm2/Vs. These excellent device properties are due to the use of an undoped InP buffer layer which avoids the diffusion of Fe from the substrate into the active layer. The data were supported by S-parameter measurements which gave a frequency limit of 20 GHz for gate dimensions of 1.6 by 200 ¿m2.
Keywords
III-V semiconductors; beryllium; gallium arsenide; indium compounds; ion implantation; junction gate field effect transistors; p-n junctions; semiconductor technology; solid-state microwave devices; vapour phase epitaxial growth; Be; GaInAs JFET; GaInAs junction FET; InP buffer layer; RPA; VPE; carrier mobility; electron saturation velocity; frequency limit of 20 GHz; ion implantation; microwave FET; p-n junction; rapid thermal annealing; semiconductors; transductance; vapour phase epitaxial growth;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19860215
Filename
4256406
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