Title :
Guest Editorial Special Section on Configurable Computing Design—II: Hardware Level Reconfiguration
Author :
Plaks, Toomas P.
Abstract :
The eight papers in this special section address the issue of configurable computing design. These papers focus on hardware level problems: how to build efficient gate arrays; security and fault tolerance issues on configurable hardware; and implementing floating-point arithmetic and specific decoders on field-programmable gate arrays (FPGAs).
Keywords :
Decoding; Fault tolerance; Field programmable gate arrays; Floating-point arithmetic; Hardware; Logic arrays; Reconfigurable logic; Security; Stochastic processes; Uncertainty;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2007.914084
