Title :
The method of estimating delay in switching circuits and the figure of merit of a switching transistor
Author_Institution :
IBM Corporation, Poughkeepsie, N. Y.
fDate :
11/1/1964 12:00:00 AM
Abstract :
A simple method of estimating delay in a switching network is outlined. The simplicity of formulas thus obtained makes them readily applicable for circuit comparisons or device optimization purposes. It is shown that a term involving the product of base resistance and diffusion capacitance forms a major limitation on high-speed, voltage-driven circuits. This method is applicable to a general class of switching problems.
Keywords :
Capacitance; Delay estimation; Design optimization; Frequency; Helium; Logic devices; Nonlinear equations; Switching circuits; Transient analysis; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1964.15372