• DocumentCode
    1023584
  • Title

    Investigation on Board-Level CDM ESD Issue in IC Products

  • Author

    Ker, Ming-Dou ; Hsiao, Yuan-Wen

  • Author_Institution
    Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu
  • Volume
    8
  • Issue
    4
  • fYear
    2008
  • Firstpage
    694
  • Lastpage
    704
  • Abstract
    The impacts caused by board-level charged-device-model (CDM) electrostatic-discharge (ESD) events on integrated-circuit products are investigated in this paper. The mechanism of board-level CDM ESD event is introduced first. Based on this mechanism, an experiment is performed to investigate the board-level CDM ESD current waveforms under different sizes of printed circuit boards (PCBs), charged voltages, and series resistances in the discharging path. Experimental results show that the discharging current strongly depends on the PCB size, charged voltage, and series resistance. Moreover, the chip- and board-level CDM ESD levels of several test devices and test circuits fabricated in CMOS processes are characterized and compared. The test results show that the board-level CDM ESD level of the test circuit is lower than the chip-level CDM ESD level of the test circuit, which demonstrates that the board-level CDM ESD event is more critical than the chip-level CDM ESD event. In addition, failure analysis reveals that the failure in the test circuit under board-level CDM ESD test is much severer than that under chip-level CDM ESD test.
  • Keywords
    CMOS integrated circuits; electrostatic discharge; failure analysis; integrated circuit testing; printed circuit testing; CMOS process; IC products; board-level CDM ESD issue; charged-device-model; electrostatic-discharge; failure analysis; integrated-circuit products; printed circuit boards; series resistance; test circuit fabrication; CMOS process; CMOS technology; Circuit testing; Electrostatic discharge; Failure analysis; Power system modeling; Printed circuits; Protection; Semiconductor device modeling; Voltage; Board-level charged-device model (CDM); chip-level CDM; electrostatic discharge (ESD); failure analysis;
  • fLanguage
    English
  • Journal_Title
    Device and Materials Reliability, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1530-4388
  • Type

    jour

  • DOI
    10.1109/TDMR.2008.2006850
  • Filename
    4700830