• DocumentCode
    1023840
  • Title

    Superconductive delay line with integral MOSFET taps

  • Author

    Delaney, Maureen A. ; Withers, Richard S. ; Anderson, Alfredo C. ; Green, Jonathan B. ; Mountain, Robert W.

  • Author_Institution
    Digital Equipment Corporation, Hudson, MA
  • Volume
    23
  • Issue
    2
  • fYear
    1987
  • fDate
    3/1/1987 12:00:00 AM
  • Firstpage
    791
  • Lastpage
    795
  • Abstract
    A superconducting tapped delay line with programmable MOS transistors for tap weights has been designed, fabricated, and tested. The device operates between 2 and 5 GHz at 4.2 K. The silicon substrate of the integrated semiconductor-superconductor device is used both as the semiconductor material for MOS processing and as the dielectric for the microstrip delay line. The superconducting material is niobium, which is processed after the semiconductor fabrication because the superconducting properties of niobium can degrade if exposed to high temperatures. Both aluminum and niobium are used for transistor gates and interconnects. The novel niobium-gate transistors worked as well as the aluminum-gate transistors at 4.2 K with channel mobilities 3 to 5 times higher than at room temperature. Test results on the weighted tapped delay line show that the amplitude of the tapped outputs may be varied linearly over an 18-dB range between 2 and 2.4 GHz by gate-voltage modulation of the MOSFET channel conductance.
  • Keywords
    Delay lines; MOS integrated circuits, analog; Microstrip circuits; Superconducting devices; Delay lines; Dielectric substrates; High temperature superconductors; MOSFET circuits; Niobium; Semiconductor materials; Silicon; Superconducting materials; Superconductivity; Testing;
  • fLanguage
    English
  • Journal_Title
    Magnetics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9464
  • Type

    jour

  • DOI
    10.1109/TMAG.1987.1064983
  • Filename
    1064983