DocumentCode
1023851
Title
High-speed ring oscillators using planar p+-gate n-AlGaAs/GaAs 2DEG FETs
Author
Suzuki, Yuya ; Hida, Hirotaka ; Toyoshima, Hisashi ; Ohata, Katsuki
Author_Institution
NEC Corporation, Microelectronics Research Laboratories, Kawasaki, Japan
Volume
22
Issue
12
fYear
1986
Firstpage
672
Lastpage
674
Abstract
An E/R DCFL ring oscillator has been fabricated using a planar n-AlGaAs/GaAs 2DEG enhancement FET with p+-gate structure. For 1 ¿m gate length E-FETs, the standard deviation of threshold voltage was as small as 17.6 mV at 0.016 V average threshold voltage. At room temperature, a gate propagation delay of 15 ps/gate at a 5.25 mW/gate power dissipation was obtained from a 25-stage ring oscillator. A small minimum power-delay product of 14 fJ/gate was attained at 0.65 V supply voltage.
Keywords
III-V semiconductors; aluminium compounds; field effect integrated circuits; gallium arsenide; high electron mobility transistors; integrated logic circuits; oscillators; 2DEG FETs; 5.25 mW/gate power dissipation; DCFL ring oscillator; HEMT; III-V semiconductors; logic IC; n-AlGaAs/GaAs; p+-gate structure; two-dimensional electron gas device;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19860460
Filename
4256658
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