Reliability analysis of a class of fault-tolerant systems

Author

Pham, Hoang ; Upadhyaya, Shambhu J.

Author_Institution

Boeing Co., Seattle, WA, USA

Volume

38

Issue

3

fYear

1989

fDate

8/1/1989 12:00:00 AM

Firstpage

333

Lastpage

337

Abstract

An architecture called the digital-data system is proposed to increase the reliability of a class of communication and network control systems. A general expression for the reliability of this system is derived using the total probability theorem, and the issue of minimizing the system cost is discussed. The architecture is quite general in that it models software fault-tolerant systems such as the recovery block scheme. Other software fault-tolerance schemes like the deadline mechanism for real-time recovery can also be modeled using this technique. A numerical example is given to illustrate the technique

Keywords

fault tolerant computing; reliability theory; communication system; deadline mechanism; digital-data system; fault-tolerant systems; network control systems; real-time recovery; recovery block scheme; reliability analysis; software fault-tolerant systems; system cost minimisation; total probability theorem; Communication system control; Computer architecture; Control systems; Costs; Fault tolerance; Fault tolerant systems; Genetic expression; Reliability theory; Software systems; Telecommunication network reliability;

fLanguage

English

Journal_Title

Reliability, IEEE Transactions on

Publisher

ieee

ISSN

0018-9529

Type

jour

DOI

10.1109/24.44175

Filename

44175