A 10-b, 75-MHz two-stage pipelined bipolar A/D converter

A 4-b flash first quantizer is cascaded with an efficient 7-b second quantizer to attain 10-b resolution after error correction. As the second quantizer itself embodies analog subranging through folding and interpolation, its complexity is comparable with that of the first quantizer. An input track and hold preceding the first quantizer acquires dynamic signals with low distortion, and a second track and hold delays the analog residue signal to pipeline the operation of the two quantizers. This collection of components, accompanied by all necessary digital circuits for encoding and error correction is fabricated on an all-NPN 4-GHz f_T bipolar IC measuring 4×4 mm, which dissipates 800 mW from ±5-V supplies. At a 75-MEPi conversion rate, the untrimmed ADC exhibits 59 db S/(N+D) with a 6-MHz full-scale input, which diminishes by only 3 dB when the input frequency rises to 50 MHz