Title :
Monolithically integrated enhancement-mode InP MISFET inverter
Author :
Antreasyan, A. ; Garbinski, P.A. ; Mattera, V.D. ; Shah, N.J. ; Temkin, H.
Author_Institution :
AT&T Bell Laboratories, Murray Hill, USA
Abstract :
Three InP MISFETs have been monolithically integrated on an Fe-doped semi-insulating InP substrate in conjunction with three integrated load resistors forming an inverter. The epitaxial layers have been grown by chloride vapour-phase epitaxy. The MISFETs exhibit transconductances as high as 200 mS/mm for a gate length of 1 ¿m. The circuit consists of one MISFET that is operated as a one transistor-inverter stage in isolation and a two-stage inverter whose output is connected to the gate of an FET. For two-stage inverters we have obtained typical high- and low-level noise margins of 0.4 and 0.3 V at a bias level of 1.5 V.
Keywords :
III-V semiconductors; field effect integrated circuits; indium compounds; insulated gate field effect transistors; integrated logic circuits; vapour phase epitaxial growth; 1 micron gate length; 200 mS/mm transconductance; III-V semiconductors; InP; InP:Fe semiinsulating substrate; MISFET inverter; digital IC; enhancement-mode; integrated load resistors; logic circuits; monolithic integration; transistor-inverter stage; vapour-phase epitaxy;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19860693
