0.5- $\mu\hbox {m}$ CMOS Implementation of Analog Heart-Rate Extraction With a Robust Peak Detector

A robust high-accuracy analog-signal-processing 0.5-mum CMOS chip for real-time heart-rate (HR) extraction is presented. A novel peak-detector architecture is proposed and implemented to facilitate on-chip integration. The system is capable of processing electrocardiogram (ECG) signals with a peak-to-peak amplitude as low as 5 mV, without any prefiltering. Experimental results with prerecorded and real-time ECG signals have demonstrated the obtained R-R interval accuracy on the order of milliseconds. The system was also used to successfully extract HR intervals with Doppler radar. Such a system may significantly reduce ADC resolution and sampling speed requirements while providing high immunity to noise and DC offset drift.