1027216

A VLSI RISC

Patterson, David A. ; Séquin, Carlo H.

University of California, Berkeley

15

9

1982

9/1/1982 12:00:00 AM

8

21

Computer aided instruction; Computer architecture; Computer errors; Delay effects; Hardware; High level languages; Reduced instruction set computing; Registers; Software systems; Very large scale integration;

English

Computer

ieee

0018-9162

jour

10.1109/MC.1982.1654133

1654133