DocumentCode :
1027534
Title :
Oxide Thickness Optimization for Digital Subthreshold Operation
Author :
Paul, Bipul C. ; Roy, Kaushik
Volume :
55
Issue :
2
fYear :
2008
Firstpage :
685
Lastpage :
688
Abstract :
Digital subthreshold operation (where supply voltage is less than the threshold voltage of the transistor) has gained a wide research interest in recent years due to its ability to achieve ultralow power consumption in applications requiring low to medium performance. It has also been demonstrated that by optimizing the device structure, one can further minimize the power consumption of digital subthreshold logic while improving its performance. This paper provides a guideline to optimize the oxide thickness of bulk MOSFETs for digital subthreshold operation. We show that the minimum possible oxide thickness provided by the technology may not always result in minimum energy for digital subthreshold operation.
Keywords :
MOSFET; low-power electronics; MOSFET; digital subthreshold logic; digital subthreshold operation; oxide thickness optimization; Design optimization; Doping profiles; Energy consumption; Guidelines; Logic devices; MOSFETs; Parasitic capacitance; Portable computers; Subthreshold current; Threshold voltage; Device design; oxide thickness optimization; subthreshold operation;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2007.912383
Filename :
4420118
Link To Document :
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