DocumentCode :
1028571
Title :
Palladio: An exploratory environment for circuit design
Author :
Brown, Harold ; Tong, Christopher ; Foyster, Gordon
Author_Institution :
Stanford University
Volume :
16
Issue :
12
fYear :
1983
Firstpage :
41
Lastpage :
56
Abstract :
Palladio is a circuit design environment for experimenting with methodologies and knowledge-based, expert-system design aids. Its framework is based on several premises about circuit design: (1) circuit design is a process of incremental refinement; (2) it is an exploratory process in which design specifications and design goals coevolve; and (3) most important, circuit designers need an integrated design environment that provides compatible design tools ranging from simulators to layout generators, that permits specification of digital systems in compatible languages ranging anywhere from architectural to layout, and includes the means for explicitly representing, constructing, and testing such design tools and languages. The Palladio environment is part of a growing trend toward creating integrated design environments and away from isolated design aids. Recently several commercial computer-aided engineering (CAE) workstations have emerged, providing multiple-level, circuit-specification entry systems and integrated analysis aids. Integrated circuit designers have a special need for such workstations because of the complexity of large integrated circuits and the high costs of prototyping them.
Keywords :
Circuit simulation; Circuit synthesis; Circuit testing; Delay; Design engineering; Digital systems; Process design; Specification languages; System testing; Workstations;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/MC.1983.1654267
Filename :
1654267
Link To Document :
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