DocumentCode
1030240
Title
Influence of carrier mobility and design parameters on field effect transistor characteristics
Author
Le Mee, J.M.
Volume
15
Issue
2
fYear
1968
fDate
2/1/1968 12:00:00 AM
Firstpage
110
Lastpage
125
Abstract
The operation of a field effect transistor (FET) having a plane circular geometry is analyzed. By taking limits, the solution for a plane rectangular geometry is obtained. The carrier mobility is assumed to vary as
, where
is the drift field and
an experimentally determined number depending on the drift field. Assuming the gradual approximation to hold, the device characteristics are established analytically and graphically. Operation in the hypercritical range decreases the device sensitivity to geometric factors and certain material constants. It concentrates the channel resistance toward the drain. The dynamic conductance is shown to be a strong function of the drift-field range and of the drain voltage, particularly in the high field ranges and for low drain voltages. The optimum drift-field range giving the highest slope and frequency limit depends on the geometry. The slope, maximum for zero bias for all ranges, is a strong function of the bias. The operational frequency limit is shown to be proportional to
, where
is the power handling capacity per unit length. For practical devices, this limit is 10 to 15 times less than the highest limit obtainable based on circuit considerations alone. The present work has confirmed the findings of previous investigations and has extended the results to cover new geometrical configurations and wider operating ranges. It provides data for device optimization and may, therefore, be of use to designers.
, where
is the drift field and
an experimentally determined number depending on the drift field. Assuming the gradual approximation to hold, the device characteristics are established analytically and graphically. Operation in the hypercritical range decreases the device sensitivity to geometric factors and certain material constants. It concentrates the channel resistance toward the drain. The dynamic conductance is shown to be a strong function of the drift-field range and of the drain voltage, particularly in the high field ranges and for low drain voltages. The optimum drift-field range giving the highest slope and frequency limit depends on the geometry. The slope, maximum for zero bias for all ranges, is a strong function of the bias. The operational frequency limit is shown to be proportional to
, where
is the power handling capacity per unit length. For practical devices, this limit is 10 to 15 times less than the highest limit obtainable based on circuit considerations alone. The present work has confirmed the findings of previous investigations and has extended the results to cover new geometrical configurations and wider operating ranges. It provides data for device optimization and may, therefore, be of use to designers.Keywords
Circuits; Conductivity; Design optimization; Electric resistance; FETs; Frequency; Geometry; Low voltage; Permittivity; Terminology;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1968.16145
Filename
1475047
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