Title :
Serial-data computation on twin pipelines
Author :
McGregor, M.S. ; Smith, S.G. ; Denyer, P.B. ; Murray, A.F.
Author_Institution :
University of Edinburgh, Department of Electrical Engineering, Edinburgh, UK
Abstract :
The letter describes a novel two-wire data representation for bit-serial architectures. The technique offers twice the data throughput of conventional bit-serial systems at a cost of much less than twice the hardware. In some cases less hardware than the conventional one-wire representation can be used to implement the two-wire representation.
Keywords :
VLSI; computer architecture; logic design; bit-serial architectures; serial data computation; twice data throughput; twin pipelines; two-wire data representation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870212
