DocumentCode
1032199
Title
Reply: Thermal model of laser diode arrays
Author
Nakwaski, Wlodzimierz
Author_Institution
Technical University of ¿ód¿, Institude of Physics,, ¿ód¿, Poland
Volume
23
Issue
9
fYear
1987
Firstpage
458
Keywords
CMOS integrated circuits; NAND circuits; digital simulation; integrated circuit technology; integrated logic circuits; invertors; logic gates; semiconductor device models; 25 to 250 C; 4 micron; CMOS logic cell switching speed; NAND gates; SPICE2G.6 simulations; average gate delay; capacitively loaded inverters; delineation factor; gate propagation delay; high temperature operation; junction temperature; temperature dependence; thermal characterisation;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19870330
Filename
4257660
Link To Document