An MDDI-Host Architecture with Low Complexity for SoC Platforms

This paper proposes a low-complexity mobile display digital interface (MDDI) architecture. We implement and verify the proposed MDDI-host architecture on a system-on-chip (SoC) platform with a 32-bit RISC CPU and a FPGA module. As a result of verification, the gate count of the MDDI host is reduced by about 50 % compared to that of the conventional parallel interface. And the bandwidth per pin of the MDDI host is 3 times more than that of a conventional parallel interface. Furthermore, the MDDI host that we implement includes the advanced high-performance bus (AHB) interface. Therefore, the proposed MDDI architecture is suitable for SoC platforms .