DocumentCode
1032803
Title
A hybrid cryotron technology: I--Circuits and devices
Author
Fruin, R.E. ; Oka, A.K. ; Bremer, J.W.
Author_Institution
General Electric Company, Sunnyvale, Calif.
Volume
2
Issue
3
fYear
1966
fDate
9/1/1966 12:00:00 AM
Firstpage
381
Lastpage
385
Abstract
The hybrid cryotron technology is explained as an effective technique for batch fabrication of large numbers of interconnected devices. Fabrication of large arrays of active devices is made practical by the fault tolerant properties of the cryotron device and the advantages of combined stencil masking and photoetching techniques. Several assemblies have been given extensive operational and temperature cycling. These assemblies included five substrate cryotron computers and four substrate content addressed memories. Details of circuit and logic design, device characteristics, and fabrication yield are described. Present work on arrays of 10 000 interconnected devices on a single substrate is reported. Fabrication yields of 99.98 percent and time constants of 10 ns are expected in the near future in arrays of this size through improvements in fabrication process control and device utilization.
Keywords
Content-addressable memory (CAM); Logic circuits; Superconducting memories; Assembly; Counting circuits; Decoding; Fabrication; Fault tolerance; Integrated circuit interconnections; Logic arrays; Logic design; Logic devices; Substrates;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/TMAG.1966.1065814
Filename
1065814
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