Josephson vortex timing circuit

We have studied a new timing circuit in which the input signal is put out at the same time as the clock signal. This is a key element for the realisation of Josephson vortex logic. We propose a new device structure which consists of two Josephson transmission lines connected by a resistor and a vortex trapping site (VTS). In this device a signal vortex is trapped in the VTS and it is repropagated to the output when the clock signal vortex propagates to the turning point. The quasistatic operation of this device is confirmed experimentally.