Design and characterization of a step-recovery switching transistor

Fast rise time pulses can be generated with a special high-frequency silicon transistor structure having a collector impurity profile designed to control charge storage in the collector. When switched out of saturation it operates in a manner analogous to a step-recovery diode. The theory of operation is discussed along with the design and fabrication of the diffused impurity profiles. Its unique geometry combines planar and mesa technologies. Experimental transistors have a storage time of approximately 2-30 ns followed by a fall time as fast as 0.5 ns. The storage time can be adjusted by varying the initial base current or the driving pulse. The storage time and fall time are accurately characterized by the charge-control model. A transformer input circuit gives the best switching performance. Control devices of conventional planar structure fail to produce fast switching times. They demonstrate the failure of the charge-control model in describing the fall time of planar transistors in general.