Title :
Novel circuit design and implementation of adaptive phase comparators
Author :
Haartsen, J.C. ; den Dulk, Richard C.
Author_Institution :
Delft University of Technology, Department of Electrical Engineering, Delft, Netherlands
Abstract :
A novel circuit implementation for an adaptive phasefrequency comparator, which can be conceived of as a 5-cell up-down counter, is proposed. This circuit can handle coincident input signals and has no dead phase zone or intermediate states. These properties greatly improve the performance of a phase-locked loop.
Keywords :
digital circuits; phase comparators; phase-locked loops; 5-cell up-down counter; PLL; adaptive phase comparators; adaptive phase-frequency comparator; circuit diagram; coincident input signals; dead zone free; performance; phase-locked loop;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19870395
