• DocumentCode
    1033037
  • Title

    Compliant bonding—A new technique for joining microelectronic components

  • Author

    Coucoulas, Alexander ; Cranston, B.H.

  • Author_Institution
    Western Electric Company, Princeton, N. J.
  • Volume
    15
  • Issue
    9
  • fYear
    1968
  • fDate
    9/1/1968 12:00:00 AM
  • Firstpage
    664
  • Lastpage
    674
  • Abstract
    Rapidly expanding emphasis on microelectronic circuitry has produced increasing demands in solid-state bonding techniques. For example, an important manufacturing step in the use of beam-leaded integrated circuits is joining the leads to surrounding circuitry. Economically, it is desirable to bond all leads simultaneously; however, when doing this a number of potential difficulties related to uniform deformation of all leads must be dealt with. One solution to these problems is a solid-state joining process called "compliant bonding." Compliant bonding utilizes a deformable medium between the tool and the beam leads. An energized tool such as that used in thermocompression bonding is brought in contact with the medium which in turn conforms to the topography of the leads and transmits the necessary energy. During the bonding operation the compliant medium controls lead deformation by partially constraining the lead; it also compensates for tolerances associated with simultaneous bonding of a multiplicity of beam leads. This technique permits the use of a flat-faced tool eliminating the need for intricate tool shapes and precise tool alignments. The paper describes the results of mechanical tests and metallographic examinations. These results show that compliant bonding is a simple and repeatable solution for simultaneous bonding of multiple beam leads and other interconnections. Other possible advantages are simplified handling and testing in high-level production.
  • Keywords
    Bonding; Integrated circuit interconnections; Integrated circuit manufacture; Joining processes; Microelectronics; Power generation economics; Shape; Solid state circuits; Surfaces; Testing;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1968.16426
  • Filename
    1475328