Testing of Precision DAC Using Low-Resolution ADC With Wobbling

Testing of high-resolution, digital-to-analog converters (DACs) with gigahertz clock rates is a challenging problem. The bottleneck is fast and accurate output measurement. This paper presents a novel high-performance DAC testing approach that uses a flash analog-to-digital converter (ADC) to achieve highspeed data acquisition, adopts the wobbling technique to provide a sufficient resolution, and processes the data with a sophisticated algorithm to guarantee high test accuracy. Simulation results show that, by using a 6-bit ADC and wobbling, the static linearity of 14-bit DACs can be tested to better than 1-LSB accuracy. The experimental results that are included in the paper also affirm the performance of the algorithm. This method provides a solution to both the production and on-chip testing problems of high-performance DACs.