DocumentCode
1034966
Title
Latching characteristics of a CMOS bistable register
Author
Friedman, Eby G.
Author_Institution
Dept. of Electr. Eng., Rochester Univ., NY, USA
Volume
40
Issue
12
fYear
1993
fDate
12/1/1993 12:00:00 AM
Firstpage
902
Lastpage
908
Abstract
Closed-form solutions describing the output response of a CMOS bistable register are presented. From these results, the fundamental latching behavior of a CMOS register is developed in terms of its physical and circuit characteristics. Necessary and sufficient conditions for latching data are described in terms of small signal circuit parameters. From these necessary and sufficient conditions, the limiting requirement for latching, which provides the minimum let-up time and conditions for defining the onset of metastability, is presented and verified
Keywords
CMOS integrated circuits; equivalent circuits; integrated logic circuits; CMOS bistable register; latching characteristics; metastability; output response; small signal circuit parameters; Circuits; Delay; Digital systems; Latches; Limiting; Metastasis; Registers; Shape; Signal resolution; Sufficient conditions;
fLanguage
English
Journal_Title
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Publisher
ieee
ISSN
1057-7122
Type
jour
DOI
10.1109/81.269031
Filename
269031
Link To Document