An 8-bit 2-ns monolithic DAC

Author

Kamoto, Tsutomu ; Akazawa, Yukilo ; Shinagawa, Mitsuru

Author_Institution

NTT LSI Labs., Kanagawa, Japan

Volume

23

Issue

1

fYear

1988

Firstpage

142

Lastpage

146

Abstract

An 8-bit resolution ultrahigh-speed monolithic digital-to-analog converter (DAC) is fabricated using super self-aligned process technology. In order to improve dynamic accuracy, which is determined by settling speed, clock feedthrough noise, and glitch, a number of circuit technologies are developed including a rise- and fall-time control switch driver, a low-noise flip-flop, and a differential buffer configuration. In addition, a chip assembly technology using a multilayer ceramic substrate is developed. The DAC exhibits a settling time to 8-bit accuracy of about 2 ns, a maximum conversion rate of 1 GHz, a glitch energy of 2 ps-V, and a 10-bit linearity error accuracy without trimming.<>

Keywords

bipolar integrated circuits; digital-analogue conversion; large scale integration; 1 GHz; 2 ns; 8-bit resolution; D/A convertors; LSI; chip assembly technology; differential buffer configuration; fall-time control switch driver; low-noise flip-flop; maximum conversion rate; monolithic DAC; multilayer ceramic substrate; rise time control switch driver; super self-aligned process technology; ultrahigh-speed; Assembly; Ceramics; Circuit noise; Clocks; Digital-analog conversion; Driver circuits; Flip-flops; Nonhomogeneous media; Switches; Switching circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.270

Filename

270