DocumentCode
1035814
Title
Fast and dense low-power multiple-valued I2L circuit
Author
Chao, Q.P. ; Tang, Zhen
Author_Institution
Jiao Tong University, Department of Electronics, Shanghai, China
Volume
23
Issue
18
fYear
1987
Firstpage
968
Lastpage
970
Abstract
A fast and dense low-power multiple-valued I2L circuit that can be made in a standard Schottky process with double-layer metallisation is proposed. The circuit consists of pnp and npn current mirrors. Schottky diodes and a normally operated threshold npn transistor with a merged pnp transistor to clamp the npn transistor and prevent the npn from going too deeply into saturation. Propagation delay times below 1 ns can be obtained.
Keywords
Schottky-barrier diodes; integrated injection logic; 1 ns; Schottky diodes; current mirrors; delay times; double-layer metallisation; low-power multiple-valued I2L circuit; merged p n p transistor; normally operated threshold n p n transistor; standard Schottky process;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19870681
Filename
4258749
Link To Document