DocumentCode
1036757
Title
Refractory self-aligned gate technology for GaAs microwave FETs and MMICS
Author
Geissberger, A.E. ; Sadler, R.A. ; Griffin, E.L. ; Bahl, I.J. ; Balzan, M.L.
Author_Institution
ITT Gallium Arsenide Technology Center, Roanoke, USA
Volume
23
Issue
20
fYear
1987
Firstpage
1073
Lastpage
1075
Abstract
A new refractory self-aligned gate technology for fabrication of field-effect transistors (FETs) with low gate resistance and improved breakdown voltage is described. The asymmetric-n+, planarised-gate process uses 1 ¿m optical lithography to produce 0.5 ¿m-gate-length FETs with very low gate resistance. The process is suitable for high-volume small-signal and power MMIC production.
Keywords
III-V semiconductors; field effect integrated circuits; gallium arsenide; integrated circuit manufacture; integrated circuit technology; microwave integrated circuits; semiconductor device manufacture; semiconductor technology; solid-state microwave devices; 0.5 micron; 1 micron; GaAs; III-V semiconductors; MMIC production; SAG; asymmetric n+ implant; fabrication; field-effect transistors; improved breakdown voltage; low gate resistance; manufacture; microwave FETs; monolithic microwave IC; optical lithography; refractory self-aligned gate technology; submicron gate length;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19870750
Filename
4258987
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