• DocumentCode
    1037152
  • Title

    Comments on "Evaluation of A+B = K conditions without carry propagation

  • Author

    Parhami, Behrooz

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
  • Volume
    43
  • Issue
    3
  • fYear
    1994
  • fDate
    3/1/1994 12:00:00 AM
  • Firstpage
    381
  • Abstract
    A special carry-free circuit for the evaluation of conditions of the type A+B=K is proposed by Cortadella and Llaberia (1992), and its usefulness for reducing the negative effects of conditional branches in pipelined architectures is noted. It is shown that the same advantages are offered by another equally simple circuit based on carry-save redundant numbers and (3, 2)-counters. This alternative circuit has other potential applications and much of it may in fact be already present in some ALU´s.<>
  • Keywords
    logic circuits; pipeline processing; (3, 2)-counters; A+B=K; addition; carry propagation; carry-free circuit; carry-save numbers; carry-save redundant numbers; comparators; conditional branches; negative effects; parallel counters; pipelined architectures; redundant number representation; Adders; Circuit testing; Counting circuits; Delay; Digital arithmetic; Hardware; Logic circuits; Performance evaluation;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.272440
  • Filename
    272440