DocumentCode :
1037161
Title :
Reconvergent fanout analysis and fault simulation complexity of combinational circuits
Author :
Maamari, Fadi ; Rajski, J.
Author_Institution :
McGill University, VLSI Design Laboratory, Department of Electrical Engineering, Montreal, Canada
Volume :
23
Issue :
21
fYear :
1987
Firstpage :
1131
Lastpage :
1133
Abstract :
The detectability of reconvergent fanout stem faults in a combinational logic circuit can be determined by explicitly simulating the faults within limited regions of the circuit. These regions are defined, and an estimate of the fault simulation complexity of the circuit is obtained. Results are presented for ten benchmark circuits.
Keywords :
combinatorial circuits; logic testing; combinational circuits; detectability; fault simulation complexity; reconvergent fanout analysis;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19870789
Filename :
4259027
Link To Document :
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