• DocumentCode
    1037645
  • Title

    Fault-tolerant schemes for parallel architectures

  • Author

    Livesey, M.J. ; Owczarczyk, J.

  • Author_Institution
    University of St. Andrews, Department of Computational Scienc, St. Andrews, UK
  • Volume
    23
  • Issue
    22
  • fYear
    1987
  • Firstpage
    1206
  • Lastpage
    1207
  • Abstract
    Fault-tolerance schemes for efficient implementation in parallel VLSI processors are discussed, and a modular approach for tree and mesh-structured architectures is described
  • Keywords
    fault tolerant computing; parallel architectures; efficient implementation; fault tolerant computing; mesh-structured architectures; modular approach; parallel VLSI processors; parallel architectures;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19870839
  • Filename
    4259078
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1037645