A reconfigurable high-frequency phase-locked loop

Reconfigurable phase-locked loops (PLLs) present the advantage of fast-frequency acquisition combined with narrow-noise bandwidth, since their parameters can be dynamically adjusted. High-frequency PLLs are generally implemented by means of analog circuits which are not easily reconfigured during operation. However, the five-port technique allows the discrimination of the phase difference between two microwave signals using a mixed circuit. In this paper the design of a PLL comprising a five-port based phase detector is presented. This system benefits from the phase-detector digital circuit to carry out the loop filtering. Simulation results for different conditions of noise and frequency acquisition are shown. We also present measurement results to confirm the simulations.