DocumentCode :
1038806
Title :
New channel routing algorithm for bit-slice applications
Author :
Nagara, S. ; Smith, S.G. ; Denyer, P.B. ; Keightley, M.
Author_Institution :
University of Edinburgh, Department of Electrical Engineering, Edinburgh, UK
Volume :
23
Issue :
25
fYear :
1987
Firstpage :
1389
Lastpage :
1391
Abstract :
A new algorithm for channel routing is presented which addresses the special problems of bit-slice architectural assembly, namely the broadcasting and cascading of signals through layout slices. This is achieved by end-on abutment of channels. The method, used in the bit-slice assembler Slicesyn, is based on a heuristic approach using graph theory.
Keywords :
VLSI; bit-slice computers; circuit layout CAD; graph theory; integrated circuit technology; logic CAD; network topology; CAD; IC design; Slicesyn; VLSI layout; bit-slice architectural assembly; bit-slice assembler; channel routing algorithm; end-on abutment; graph theory; heuristic approach; layout slices;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19870959
Filename :
4259201
Link To Document :
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