• DocumentCode
    1038935
  • Title

    A pairwise substitutional fault tolerance technique for the cube-connected cycles architecture

  • Author

    Tzeng, Nian-Feng ; Chuang, Po-Jen

  • Author_Institution
    Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
  • Volume
    5
  • Issue
    4
  • fYear
    1994
  • fDate
    4/1/1994 12:00:00 AM
  • Firstpage
    433
  • Lastpage
    438
  • Abstract
    With all of the salient features of hypercubes, the cube-connected cycles (CCC) structure is an attractive parallel computation network suited for very large scale integration (VLSI) implementation because of its layout regularity. Unfortunately, the classical CCC structure tends to suffer from considerable performance degradation in the presence of faults. The authors deal with a fault-tolerant CCC structure obtained by incorporating a spare PE in each cycle and by adding extra links among PE´s to realize dimensional substitutes for failed PE´s in the immediate lower dimension. A unique feature of this design lies in that a faulty PE and its laterally connected PE are always replaced at the same time by their immediate vertical successor pair, achieving pairwise substitution to elegantly maintain the rigid full CCC structure after faulty PE´s arise. The proposed structure improves reliability substantially without incurring large overhead in layout area. This design is compared with earlier fault-tolerant CCC designs in terms of normalized reliability, which takes area overhead into account. An extension to this fault-tolerant structure is also discussed
  • Keywords
    VLSI; fault tolerant computing; multiprocessor interconnection networks; CCC; VLSI layout; cube-connected cycles architecture; fault tolerance; fault-tolerant CCC structure; fault-tolerant structure; layout area; performance degradation; reconfiguration; reliability analysis; Computer architecture; Computer networks; Concurrent computing; Degradation; Fault tolerance; Fault tolerant systems; Hypercubes; Parallel processing; Topology; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/71.273049
  • Filename
    273049